Capstone projects on Verilog, Punjab

1 3D Lifting based Discrete Wavelet Transform
2 Design of High Speed Hardware Efficient 4-Bit SFQ Multiplier
3 An Area-Efficient Universal Cryptography Processor for Smart Cards
4 A High-Speed/Low-Power Multiplier using Spurious Power Suppression Technique
5 A Lossless Data Compression and Decompression Algorithm and Its Hardware Architecture
6 Low-Complexity Turbo Decoder Architecture for Energy-Efficient Wireless Sensor Networks
7 An Efficient VLSI Architecture for Removal of Impulse Noise in Image
8 A Processor-In-Memory Architecture for Multimedia Compression
9 A Symbol-Rate Timing Synchronization Method for Low Power Wireless OFDM Systems
10 Implementation of Low Power and High Speed Multiplier-Accumulator Using SPST Adder and Verilog
11 Design and VLSI Implementation of Anti-collision Enabled Robot Processor Using RFID Technology
12 Adiabatic Technique for Power Efficient Logic Circuit Design
13 Advanced Encryption System to Improvise the System Computing Speed
14 AMBA-Advanced High Performance Bus IP Block
15 A Multichannel Multimode RF Transceiver with DSM
16 Asynchronous Transfer Mode Knockout Switch Concentrator:
17 Behavioral Synthesis of Asynchronous Circuits
18 Building an AMBA AHB Compliant Memory Controller
19 Implementation of Carry Tree Adder
20 Fixed Angle of Rotation Using CORDIC Designs
21 Design of FPGA based 32-bit Floating Point Arithmetic Unit
22 Design and Synthesis of a Field Programmable CRC Circuit Architecture
23 Design of an On-Chip Permutation Network for Multiprocessor SOC
24 VLSI Architecture for Visible Watermarking in a Secure Still Digital Camera (S2DC) Design
25 Design and Implementation of Efficient Systolic Array Architecture
26 VHDL Environment for Floating Point Arithmetic Logic Unit
27 Design and Implementation of High Speed DDR SDRAM Controller
28 Design and Synthesis of QPSK:
29 Design of Multi Value Logic Using Quantum Dot Gate FET
30 Design and Simulation of FFT Processor Using Radix-4 Algorithm Using FPGA
31 Design and Implementation of 32 – bit RISC Processor:
32 VHDL Model of Smart Sensor:
33 Fuzzy based PID Controller using VHDL for Transportation Application
34 Implementation of Bus Bridge between AHB and OCP
35 Design of Control Area Network Protocol
36 DMA Controller for AMBA Bus IP Core
37 High Precision Stepper Motor Controller Implementation on FPGA
38 Design and Modeling of I2C Bus Controller
39 Design and Implementation of CPLD based Solar Power Saving System
40 Designing Fuzzy Based Mobile Robot Controller using VHDL
41 Design and Implementation of a Real-time Traffic Light Control System
42 FPGA Based Digital Space Vector PWM Three Phase Voltage Source Inverter
43 Performance Evaluation of Complex Multiplier Using Advance Algorithm
44 A Highly linear CMOS Gm-C Low Pass Filter for Mobile Communication
45 Design of High Throughput DCT Core Design by Efficient Computation Mechanism
46 Low Power QVCO using Adiabatic Logic
47 Low Power Adaptive Viterbi Decoder Design for Trellis Coded Modulation:
48 VLSI Implementation of Discrete Wavelet Transform (DWT) for Image Compression
49 Implementation of OFDM System using IFFT and FFT
50 Design and Implementation of Hamming Code on FPGA using Verilog

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